MADT / APIC
The Multiple APIC (Advanced Programmable Interrupt Controller) Description Table
Last updated
The Multiple APIC (Advanced Programmable Interrupt Controller) Description Table
Last updated
This table is used for the ACPI Parking Protocol. It is a protocol that allows parked CPU cores to be unparked. The parked state doesn't allow the CPU cores to execute any code, they are "disabled".
The document that describes the ACPI Parking Protocol is here: Multi-processor Startup for ARM Platforms
The grate-driver/linux GitHub repository contains a working arm32 version of the ACPI Parking Protocol (Link points to the source file). It allows the usage of SMP on the Surface RT and on other arm32 Windows RT devices. (When you boot Linux from UEFI; not used in APX mode).
The following table describes the MADT entries of the 4 CPU cores. The ACPI Parking Protocol only requires to unpark CPU1-3, as CPU0 is already in use.
The MADT table has an entry about the Generic Interrupt Distributor. Here are the contents:
CPU0
CPU1
CPU2
CPU3
Subtable Type
(0B = Generic Interrupt Controller)
0x0B
0x0B
0x0B
0x0B
Subtable Length
0x28
0x28
0x28
0x28
Reserved
0x0
0x0
0x0
0x0
CPU Interface Number
0x0
0x1
0x2
0x3
Processor UID
0x0
0x1
0x2
0x3
Processor Enabled
True (1)
True (1)
True (1)
True (1)
Performance Interrupt Trigger Mode
False (0)
False (0)
False (0)
False (0)
Virtual GIC Interrupt Trigger Mode
False (0)
False (0)
False (0)
False (0)
Parking Protocol Version
1.0
1.0
1.0
1.0
Performance Interrupt
B0
B1
B2
B3
Parked Address
0x82001000
0x82002000
0x82003000
0x82004000
Base Address
0x0
0x0
0x0
0x0
Generic Interrupt Distributor
Subtable Type
(0C = Generic Interrupt Distributor)
0x0C
Length
0x18
Reserved
0x0
Local GIC Hardware ID
0x0
Base Address
0x50041000
Interrupt Base
0x0
Version
0.0
Reserved (x2)
0x0